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This article first introduces the semiconductor manufacturing process and its need for equipment and materials, followed by the description of the IC wafer production line of the seven main production areas and the required equipment and materials, and finally a detailed introduction to the semiconductor manufacturing process, specific follow the small make up to understand.

First, the semiconductor manufacturing process and the equipment and materials needed

Semiconductor product processing mainly includes wafer manufacturing (Front-End) and packaging (Back-End) test, with the penetration of advanced packaging technology, the emergence of between wafer manufacturing and packaging processing links, known as the middle of the road (Middle-End).semiconductor system As semiconductor products have many processing procedures, a large number of semiconductor equipment and materials are required in the manufacturing process. Here, we take the most complex wafer manufacturing (front-channel) and traditional packaging (back-channel) process as an example to illustrate the manufacturing process of the required equipment and materials.

The IC Industry Chain

The wafer production line can be divided into seven separate production areas: diffusion (Thermal Process), photolithography (photo- lithography), etching (Etch), ion implantation (Ion Implant), thin film growth (Dielectric DeposiTIon), polishing (CMP), metallization (MetalizaTIon). MetalizaTIon.) These seven main production areas and the associated steps and measurements are performed in a wafer clean room. Several types of semiconductor equipment are placed in each of these production areas to meet different needs. For example, in the photolithography area, in addition to the photolithography machine, there is also a matching coating/development and measurement equipment.

Advanced Packaging Technologies and Middle-End Technologies

IC wafer manufacturing flow chart

Second, the IC wafer production line of the seven main production areas and the required equipment and materials

Traditional packaging process flow

The traditional packaging (back-end) test process can be roughly divided into eight major steps: backside thinning, wafer dicing, placement, lead bonding, molding, plating, rib cutting / forming and final testing. Compared with IC wafer manufacturing (front-end), back-end packaging is relatively simple,semiconductor test system less technically difficult, and the requirements for process environment, equipment and materials are much lower than those for wafer manufacturing.

Third, the main steps of traditional packaging and the required equipment and materials

Fourth, the semiconductor manufacturing process analysis

Semiconductor manufacturing process is the means of realization of integrated circuits, but also the basis of integrated circuit design. Since the invention of the transistor in 1948, the development of semiconductor device technology has experienced three major stages: 1950 alloy process, the first production of a practical alloy junction transistor; 1955 diffusion technology is the adoption of semiconductor manufacturing technology is a major development for the manufacture of high-frequency devices to open up a new way; 1960 planar process and the emergence of epitaxial technology is a major change in semiconductor manufacturing technology, not only is it the means to achieve integrated circuits, but also the basis of integrated circuit design. The emergence of 1960 planar process and epitaxial technology is a major change in semiconductor manufacturing technology, not only significantly improve the frequency and power characteristics of the device, improve the stability and reliability of the device,semiconductor solutions but also to make the semiconductor integrated circuits industrialized mass production to become a reality. At present, the plane process is still the mainstream process of semiconductor device and integrated circuit production.

In the first 35 years of semiconductor manufacturing process development, the feature size reduction is a sign of semiconductor technology development, effective isometric shrinkage (Scaling-down) efforts focused on improving performance by increasing device speeds as well as integrating more devices and functionality on a chip with an acceptable yield. However, as the semiconductor industry evolves to the 45nm node or smaller, device scaling-down will present significant technical challenges. Two of these challenges are increasing static power consumption and inconsistency in device characteristics. These issues are at a time when the CMOS process is approaching the physical limits dictated by atomic theory and quantum mechanics.

IC fabrication is the execution of a series of complex chemical or physical operations on a silicon wafer, which, in simple terms, can be categorized into four basic classes: thin-film fabrication (1ayer), patterning, etching, and doping. These in a single chip on the production of transistors and processing interconnections of the technology synthesized into the semiconductor manufacturing process.

I. Photolithography

ProcessPhotolithography is a process in which a specific portion of the film on the surface of a wafer is removed through a series of production steps. After this, the wafer surface is left with a thin film with a micrographic structure. The removed portion may be in the shape of a hole in the film or a residual island.The goal of photolithography is to produce feature patterns that are dimensionally accurate according to the requirements of the circuit design, are correctly positioned on the wafer surface, and are correctly associated with other components.Through the photolithography process, the portion of the feature pattern is ultimately retained on the wafer. Sometimes called Photomasking, Masking, Photolithography or Microlithography, the photolithography process is the most critical of the semiconductor manufacturing processes. Errors made during the photolithography process can result in distorted patterns or poor registration, which can ultimately translate into effects on the electrical characteristics of the device.

Second, the doping process

Doping is the process of introducing a specific amount of impurities into the surface layer of the wafer through a thin film opening, which is realized in two ways: thermal diffusion (thermal diffusion) and ion implantation (implantaTIon).Thermal diffusion is a chemical reaction that occurs at temperatures around 1000°C, where the wafer is exposed to a certain doping element in a gaseous state.A simple example of diffusion is the release of deodorant from a pressure vessel into a room. The dopant atoms in the gaseous state migrate to the surface of the exposed wafer through a diffusion chemical reaction, forming a thin film. In chip applications, thermal diffusion is also known as solid-state diffusion because the wafer material is solid. Thermal diffusion is a chemical reaction process. Ion implantation, on the other hand, is a physical reaction process. The wafer is placed at one end of the ion implanter and the dopant ion source (usually gaseous) is at the other end. At one end of the ion source, the dopant atoms are ionized (with a certain charge) and are charged by an electric field to ultra-high velocities across the surface of the wafer.The momentum of the atoms injects the dopant atoms into the wafer surface layer, as if a bullet were fired from a gun into a wall. The purpose of the doping process is to create pocket-shaped regions within the wafer surface layer